=================================================================== RCS file: /cvsrepo/anoncvs/cvs/src/usr.bin/pctr/pctrvar.h,v retrieving revision 1.3 retrieving revision 1.4 diff -c -r1.3 -r1.4 *** src/usr.bin/pctr/pctrvar.h 2007/11/16 15:03:31 1.3 --- src/usr.bin/pctr/pctrvar.h 2012/07/11 08:07:20 1.4 *************** *** 1,4 **** ! /* $OpenBSD: pctrvar.h,v 1.3 2007/11/16 15:03:31 mikeb Exp $ */ /* * Copyright (c) 2007 Mike Belopuhov, Aleksey Lomovtsev --- 1,4 ---- ! /* $OpenBSD: pctrvar.h,v 1.4 2012/07/11 08:07:20 guenther Exp $ */ /* * Copyright (c) 2007 Mike Belopuhov, Aleksey Lomovtsev *************** *** 133,139 **** { 0x21, 0, "L2_ADS", "Number of L2 address strobes." }, { 0x22, 0, "L2_DBUS_BUSY", ! "Number of cycles durring which the data bus was busy." }, { 0x23, 0, "L2_DBUS_BUSY_RD", "Number of cycles during which the data bus was busy transferring " "data from L2 to the processor." }, --- 133,139 ---- { 0x21, 0, "L2_ADS", "Number of L2 address strobes." }, { 0x22, 0, "L2_DBUS_BUSY", ! "Number of cycles during which the data bus was busy." }, { 0x23, 0, "L2_DBUS_BUSY_RD", "Number of cycles during which the data bus was busy transferring " "data from L2 to the processor." }, *************** *** 220,226 **** "Number of ITLB misses." }, { 0x86, 0, "IFU_MEM_STALL", "Number of cycles that the instruction fetch pipe stage is stalled, " ! "including cache mises, ITLB misses, ITLB faults, " "and victim cache evictions" }, { 0x87, 0, "ILD_STALL", "Number of cycles that the instruction length decoder is stalled" }, --- 220,226 ---- "Number of ITLB misses." }, { 0x86, 0, "IFU_MEM_STALL", "Number of cycles that the instruction fetch pipe stage is stalled, " ! "including cache misses, ITLB misses, ITLB faults, " "and victim cache evictions" }, { 0x87, 0, "ILD_STALL", "Number of cycles that the instruction length decoder is stalled" }, *************** *** 231,237 **** { 0xc1, CFL_C0, "FLOPS", "Number of computational floating-point operations retired." }, { 0xc2, 0, "UOPS_RETIRED", ! "Number of UOPs retired." }, { 0xc4, 0, "BR_INST_RETIRED", "Number of branch instructions retired." }, { 0xc5, 0, "BR_MISS_PRED_RETIRED", --- 231,237 ---- { 0xc1, CFL_C0, "FLOPS", "Number of computational floating-point operations retired." }, { 0xc2, 0, "UOPS_RETIRED", ! "Number of micro-ops retired." }, { 0xc4, 0, "BR_INST_RETIRED", "Number of branch instructions retired." }, { 0xc5, 0, "BR_MISS_PRED_RETIRED", *************** *** 246,252 **** { 0xc9, 0, "BR_TAKEN_RETIRED", "Number of taken branches retired." }, { 0xca, 0, "BR_MISS_PRED_TAKEN_RET", ! "Number of taken mispredictioned branches retired." }, { 0xd0, 0, "INST_DECODER", "Number of instructions decoded." }, { 0xd2, 0, "PARTIAL_RAT_STALLS", --- 246,252 ---- { 0xc9, 0, "BR_TAKEN_RETIRED", "Number of taken branches retired." }, { 0xca, 0, "BR_MISS_PRED_TAKEN_RET", ! "Number of taken mispredicted branches retired." }, { 0xd0, 0, "INST_DECODER", "Number of instructions decoded." }, { 0xd2, 0, "PARTIAL_RAT_STALLS", *************** *** 353,359 **** { 0x4e, CFL_UM, "L1D_PREFETCH", "L1 DCACHE prefetch requests" }, { 0x4f, 0, "L1_PREF_REQ", ! "Number of L1 prefetch requests due to DCU cache misse.s" }, { 0x60, CFL_SA|CFL_UM, "BUS_REQ_OUTSTANDING", "Number of bus requests outstanding." }, { 0x61, CFL_SA, "BUS_BNR_DRV", --- 353,359 ---- { 0x4e, CFL_UM, "L1D_PREFETCH", "L1 DCACHE prefetch requests" }, { 0x4f, 0, "L1_PREF_REQ", ! "Number of L1 prefetch requests due to DCU cache misses." }, { 0x60, CFL_SA|CFL_UM, "BUS_REQ_OUTSTANDING", "Number of bus requests outstanding." }, { 0x61, CFL_SA, "BUS_BNR_DRV", *************** *** 406,412 **** { 0x7e, 0, "BUS_SNOOP_STALL", "Number of clock cycles during which the bus is snoop stalled." }, { 0x7f, CFL_UM, "BUS_IO_WAIT", ! "Number of cycles during which IO requests wait int the bus queue." }, { 0x80, 0, "ICACHE_READS", "Number of instruction fetches, both cacheable and non-cacheable." }, { 0x81, 0, "ICACHE_MISSES", --- 406,412 ---- { 0x7e, 0, "BUS_SNOOP_STALL", "Number of clock cycles during which the bus is snoop stalled." }, { 0x7f, CFL_UM, "BUS_IO_WAIT", ! "Number of cycles during which IO requests wait in the bus queue." }, { 0x80, 0, "ICACHE_READS", "Number of instruction fetches, both cacheable and non-cacheable." }, { 0x81, 0, "ICACHE_MISSES", *************** *** 456,462 **** { 0x98, 0, "BR_TKN_BUBBLE_2", "Number of times a taken branch predicted taken with bubble 2." }, { 0xa0, 0, "RS_UOPS_DISPATCHED", ! "Number of microops dispatched for execution." }, { 0xa1, CFL_UM, "RS_UOPS_DISPATCHED", "Number of cycles for which micro-ops dispatched for execution." }, { 0xa2, 0, "RESOURCE_STALL", --- 456,462 ---- { 0x98, 0, "BR_TKN_BUBBLE_2", "Number of times a taken branch predicted taken with bubble 2." }, { 0xa0, 0, "RS_UOPS_DISPATCHED", ! "Number of micro-ops dispatched for execution." }, { 0xa1, CFL_UM, "RS_UOPS_DISPATCHED", "Number of cycles for which micro-ops dispatched for execution." }, { 0xa2, 0, "RESOURCE_STALL", *************** *** 477,483 **** { 0xc1, 0, "FP_COMP_INSTR_RET", "Number of computational floating-point operations retired." }, { 0xc2, 0, "UOPS_RET", ! "Number of UOPs retired." }, { 0xc3, 0, "SMC_DETECTED", "Number of times self-modifying code condition detected." }, { 0xc4, 0, "BR_INST_RET", --- 477,483 ---- { 0xc1, 0, "FP_COMP_INSTR_RET", "Number of computational floating-point operations retired." }, { 0xc2, 0, "UOPS_RET", ! "Number of micro-ops retired." }, { 0xc3, 0, "SMC_DETECTED", "Number of times self-modifying code condition detected." }, { 0xc4, 0, "BR_INST_RET", *************** *** 494,500 **** { 0xc9, 0, "BR_TAKEN_RET", "Number of taken branch instructions retired."}, { 0xca, 0, "BR_MISPRED_TAKEN_RET", ! "Number of taken andmispredicted branch instructions retired." }, { 0xcb, 0, "MEM_LOAD_RETIRED", "Number of retired load operations that missed the L1 DCACHE." }, { 0xcc, 0, "MMX_FP_TRANS", --- 494,500 ---- { 0xc9, 0, "BR_TAKEN_RET", "Number of taken branch instructions retired."}, { 0xca, 0, "BR_MISPRED_TAKEN_RET", ! "Number of taken and mispredicted branch instructions retired." }, { 0xcb, 0, "MEM_LOAD_RETIRED", "Number of retired load operations that missed the L1 DCACHE." }, { 0xcc, 0, "MMX_FP_TRANS", *************** *** 520,526 **** { 0xd9, 0, "SIMD_FP_COM_RET", "Number of SSE/SSE2 compute instructions retired." }, { 0xda, 0, "FUSED_UOPS_RET", ! "Number of all fused uops retired." }, { 0xdb, 0, "UNFUSION", "Number of all unfusion events in the ROB." }, { 0xdc, CFL_UM, "RESOURCE_STALLS", --- 520,526 ---- { 0xd9, 0, "SIMD_FP_COM_RET", "Number of SSE/SSE2 compute instructions retired." }, { 0xda, 0, "FUSED_UOPS_RET", ! "Number of all fused micro-ops retired." }, { 0xdb, 0, "UNFUSION", "Number of all unfusion events in the ROB." }, { 0xdc, CFL_UM, "RESOURCE_STALLS", *************** *** 587,593 **** { 0x88, 0, "Return stack hits", NULL }, { 0x89, 0, "Return stack overflows", NULL }, { 0xc0, 0, "Retired instructions", NULL }, ! { 0xc1, 0, "Retired microops", NULL }, { 0xc2, 0, "Retired branch instructions", NULL }, { 0xc3, 0, "Retired mispredicted branch instructions", NULL }, { 0xc4, 0, "Retired taken branch instructions", NULL }, --- 587,593 ---- { 0x88, 0, "Return stack hits", NULL }, { 0x89, 0, "Return stack overflows", NULL }, { 0xc0, 0, "Retired instructions", NULL }, ! { 0xc1, 0, "Retired micro-ops", NULL }, { 0xc2, 0, "Retired branch instructions", NULL }, { 0xc3, 0, "Retired mispredicted branch instructions", NULL }, { 0xc4, 0, "Retired taken branch instructions", NULL }, *************** *** 596,602 **** { 0xc7, 0, "Retired branch resyncs", NULL }, { 0xc8, 0, "Retired near returns", NULL }, { 0xc9, 0, "Retired mispredicted near returns", NULL }, ! { 0xca, 0, "Retired mispredicted indirect brnaches", NULL }, { 0xcb, 0, "Retired MMX/FP instructions", NULL }, { 0xcc, 0, "Retired fastpath double op instructions", NULL }, { 0xcd, 0, "Interrupts-masked cycles", NULL }, --- 596,602 ---- { 0xc7, 0, "Retired branch resyncs", NULL }, { 0xc8, 0, "Retired near returns", NULL }, { 0xc9, 0, "Retired mispredicted near returns", NULL }, ! { 0xca, 0, "Retired mispredicted indirect branches", NULL }, { 0xcb, 0, "Retired MMX/FP instructions", NULL }, { 0xcc, 0, "Retired fastpath double op instructions", NULL }, { 0xcd, 0, "Interrupts-masked cycles", NULL }, *************** *** 607,613 **** { 0xd2, 0, "Dispatch stalls for branch abort retire", NULL }, { 0xd3, 0, "Dispatch stalls for serialisation", NULL }, { 0xd4, 0, "Dispatch stalls for segment load", NULL }, ! { 0xd5, 0, "Dispatch stalls for reoder buffer full", NULL }, { 0xd6, 0, "Dispatch stalls for reservation station full", NULL }, { 0xd7, 0, "Dispatch stalls for FPU full", NULL }, { 0xd8, 0, "Dispatch stalls for LS full", NULL }, --- 607,613 ---- { 0xd2, 0, "Dispatch stalls for branch abort retire", NULL }, { 0xd3, 0, "Dispatch stalls for serialisation", NULL }, { 0xd4, 0, "Dispatch stalls for segment load", NULL }, ! { 0xd5, 0, "Dispatch stalls for reorder buffer full", NULL }, { 0xd6, 0, "Dispatch stalls for reservation station full", NULL }, { 0xd7, 0, "Dispatch stalls for FPU full", NULL }, { 0xd8, 0, "Dispatch stalls for LS full", NULL },