Annotation of src/usr.bin/pctrctl/pctrctl.c, Revision 1.3
1.3 ! dm 1: /* $OpenBSD: pctrctl.c,v 1.2 1996/08/14 03:02:52 dm Exp $ */
! 2:
1.1 dm 3: /*
1.3 ! dm 4: * Pentium performance counter control program for OpenBSD.
! 5: * Copyright 1996 David Mazieres <dm@lcs.mit.edu>.
! 6: *
! 7: * Modification and redistribution in source and binary forms is
! 8: * permitted provided that due credit is given to the author and the
! 9: * OpenBSD project (for instance by leaving this copyright notice
! 10: * intact).
1.1 dm 11: */
12:
13: #include <stdio.h>
14: #include <stdlib.h>
15: #include <string.h>
16: #include <sys/types.h>
17: #include <sys/stat.h>
18: #include <sys/ioctl.h>
19: #include <fcntl.h>
1.2 dm 20: #include <machine/cpu.h>
1.1 dm 21: #include <machine/pctr.h>
22:
23: char *progname;
1.3 ! dm 24: int cpufamily;
! 25:
! 26: #define CFL_MESI 0x1 /* Unit mask accepts MESI encoding */
! 27: #define CFL_SA 0x2 /* Unit mask accepts Self/Any bit */
! 28: #define CFL_C0 0x4 /* Counter 0 only */
! 29: #define CFL_C1 0x8 /* Counter 1 only */
! 30:
! 31: struct ctrfn {
! 32: u_int fn;
! 33: int flags;
! 34: char *name;
! 35: char *desc;
! 36: };
1.1 dm 37:
1.3 ! dm 38: struct ctrfn p5fn[] = {
! 39: {0x00, 0, "Data read", NULL},
! 40: {0x01, 0, "Data write", NULL},
! 41: {0x02, 0, "Data TLB miss", NULL},
! 42: {0x03, 0, "Data read miss", NULL},
! 43: {0x04, 0, "Data write miss", NULL},
! 44: {0x05, 0, "Write (hit) to M or E state lines", NULL},
! 45: {0x06, 0, "Data cache lines written back", NULL},
! 46: {0x07, 0, "Data cache snoops", NULL},
! 47: {0x08, 0, "Data cache snoop hits", NULL},
! 48: {0x09, 0, "Memory accesses in both pipes", NULL},
! 49: {0x0a, 0, "Bank conflicts", NULL},
! 50: {0x0b, 0, "Misaligned data memory references", NULL},
! 51: {0x0c, 0, "Code read", NULL},
! 52: {0x0d, 0, "Code TLB miss", NULL},
! 53: {0x0e, 0, "Code cache miss", NULL},
! 54: {0x0f, 0, "Any segment register load", NULL},
! 55: {0x12, 0, "Branches", NULL},
! 56: {0x13, 0, "BTB hits", NULL},
! 57: {0x14, 0, "Taken branch or BTB hit", NULL},
! 58: {0x15, 0, "Pipeline flushes", NULL},
! 59: {0x16, 0, "Instructions executed", NULL},
! 60: {0x17, 0, "Instructions executed in the V-pipe", NULL},
! 61: {0x18, 0, "Bus utilization (clocks)", NULL},
! 62: {0x19, 0, "Pipeline stalled by write backup", NULL},
! 63: {0x1a, 0, "Pipeline stalled by data memory read", NULL},
! 64: {0x1b, 0, "Pipeline stalled by write to E or M line", NULL},
! 65: {0x1c, 0, "Locked bus cycle", NULL},
! 66: {0x1d, 0, "I/O read or write cycle", NULL},
! 67: {0x1e, 0, "Noncacheable memory references", NULL},
! 68: {0x1f, 0, "AGI (Address Generation Interlock)", NULL},
! 69: {0x22, 0, "Floating-point operations", NULL},
! 70: {0x23, 0, "Breakpoint 0 match", NULL},
! 71: {0x24, 0, "Breakpoint 1 match", NULL},
! 72: {0x25, 0, "Breakpoint 2 match", NULL},
! 73: {0x26, 0, "Breakpoint 3 match", NULL},
! 74: {0x27, 0, "Hardware interupts", NULL},
! 75: {0x28, 0, "Data read or data write", NULL},
! 76: {0x29, 0, "Data read miss or data write miss", NULL},
! 77: {0x0, 0, NULL, NULL},
1.1 dm 78: };
79:
1.3 ! dm 80: struct ctrfn p6fn[] = {
! 81: {0x03, 0, "LD_BLOCKS",
! 82: "Number of store buffer blocks."},
! 83: {0x04, 0, "SB_DRAINS",
! 84: "Number of store buffer drain cycles."},
! 85: {0x04, 0, "MISALIGN_MEM_REF",
! 86: "Number of misaligned data memory references."},
! 87: {0x06, 0, "SEGMENT_REG_LOADS",
! 88: "Number of segment register loads."},
! 89: {0x10, CFL_C0, "FP_COMP_OPS_EXE",
! 90: "Number of computational floating-point operations executed."},
! 91: {0x11, CFL_C1, "FP_ASSIST",
! 92: "Number of floating-point exception cases handled by microcode."},
! 93: {0x12, CFL_C1, "MUL",
! 94: "Number of multiplies."},
! 95: {0x13, CFL_C1, "DIV",
! 96: "Number of divides."},
! 97: {0x14, CFL_C0, "CYCLES_DIV_BUSY",
! 98: "Number of cycles during which the divider is busy."},
! 99: {0x21, 0, "L2_ADS",
! 100: "Number of L2 address strobes."},
! 101: {0x22, 0, "L2_DBUS_BUSY",
! 102: "Number of cycles durring which the data bus was busy."},
! 103: {0x23, 0, "L2_DBUS_BUSY_RD",
! 104: "Number of cycles during which the data bus was busy transferring "
! 105: "data from L2 to the processor."},
! 106: {0x24, 0, "L2_LINES_IN",
! 107: "Number of lines allocated in the L2."},
! 108: {0x25, 0, "L2_M_LINES_INM",
! 109: "Number of modified lines allocated in the L2."},
! 110: {0x26, 0, "L2_LINES_OUT",
! 111: "Number of lines removed from the L2 for any reason."},
! 112: {0x27, 0, "L2_M_LINES_OUTM",
! 113: "Number of modified lines removed from the L2 for any reason."},
! 114: {0x28, CFL_MESI, "L2_IFETCH",
! 115: "Number of L2 instruction fetches."},
! 116: {0x29, CFL_MESI, "L2_LD",
! 117: "Number of L2 data loads."},
! 118: {0x2a, CFL_MESI, "L2_ST",
! 119: "Number of L2 data stores."},
! 120: {0x2e, CFL_MESI, "L2_RQSTS",
! 121: "Number of L2 requests."},
! 122: {0x43, 0, "DATA_MEM_REFS",
! 123: "All memory references, both cacheable and non-cacheable."},
! 124: {0x45, 0, "DCU_LINES_IN",
! 125: "Total lines allocated in the DCU."},
! 126: {0x46, 0, "DCU_M_LINES_IN",
! 127: "Number of M state lines allocated in the DCU."},
! 128: {0x47, 0, "DCU_M_LINES_OUT",
! 129: "Number of M state lines evicted from the DCU. "
! 130: "This includes evictions via snoop HITM, interfention or replacement"},
! 131: {0x48, 0, "DCU_MISS_OUTSTANDING",
! 132: "Weighted number of cycles while a DCU miss is outstanding."},
! 133: {0x60, 0, "BUS_REQ_OUTSTANDING",
! 134: "Number of bus requests outstanding."},
! 135: {0x61, 0, "BUS_BNR_DRV",
! 136: "Number of bus clock cycles during which the processor is "
! 137: "driving the BNR pin."},
! 138: {0x62, CFL_SA, "BUS_DRDY_CLOCKS",
! 139: "Number of clocks during which DRDY is asserted."},
! 140: {0x63, CFL_SA, "BUS_LOCK_CLOCKS",
! 141: "Number of clocks during which LOCK is asserted."},
! 142: {0x64, 0, "BUS_DATA_RCV",
! 143: "Number of bus clock cycles during which the processor is "
! 144: "receiving data."},
! 145: {0x65, CFL_SA, "BUS_TRAN_BRD",
! 146: "Number of burst read transactions."},
! 147: {0x66, CFL_SA, "BUS_TRAN_RFO",
! 148: "Number of read for ownership transactions."},
! 149: {0x67, CFL_SA, "BUS_TRANS_WB",
! 150: "Number of write back transactions."},
! 151: {0x68, CFL_SA, "BUS_TRAN_IFETCH",
! 152: "Number of instruction fetch transactions."},
! 153: {0x69, CFL_SA, "BUS_TRAN_INVAL",
! 154: "Number of invalidate transactions."},
! 155: {0x6a, CFL_SA, "BUS_TRAN_PWR",
! 156: "Number of partial write transactions."},
! 157: {0x6b, CFL_SA, "BUS_TRANS_P",
! 158: "Number of partial transactions."},
! 159: {0x6c, CFL_SA, "BUS_TRANS_IO",
! 160: "Number of I/O transactions."},
! 161: {0x6d, CFL_SA, "BUS_TRAN_DEF",
! 162: "Number of deferred transactions."},
! 163: {0x6e, CFL_SA, "BUS_TRAN_BURST",
! 164: "Number of burst transactions."},
! 165: {0x6f, CFL_SA, "BUS_TRAN_MEM",
! 166: "Number of memory transactions."},
! 167: {0x70, CFL_SA, "BUS_TRAN_ANY",
! 168: "Number of all transactions."},
! 169: {0x79, 0, "CPU_CLK_UNHALTED",
! 170: "Number of cycles during which the processor is not halted."},
! 171: {0x7a, 0, "BUS_HIT_DRV",
! 172: "Number of bus clock cycles during which the processor is "
! 173: "driving the HIT pin."},
! 174: {0x7b, 0, "BUS_HITM_DRV",
! 175: "Number of bus clock cycles during which the processor is "
! 176: "driving the HITM pin."},
! 177: {0x7e, 0, "BUS_SNOOP_STALL",
! 178: "Number of clock cycles during which the bus is snoop stalled."},
! 179: {0x80, 0, "IFU_IFETCH",
! 180: "Number of instruction fetches, both cacheable and non-cacheable."},
! 181: {0x81, 0, "IFU_IFETCH_MISS",
! 182: "Number of instruction fetch misses."},
! 183: {0x85, 0, "ITLB_MISS",
! 184: "Number of ITLB misses."},
! 185: {0x86, 0, "IFU_MEM_STALL",
! 186: "Number of cycles that the instruction fetch pipe stage is stalled, "
! 187: "including cache mises, ITLB misses, ITLB faults, "
! 188: "and victim cache evictions"},
! 189: {0x87, 0, "ILD_STALL",
! 190: "Number of cycles that the instruction length decoder is stalled"},
! 191: {0xa2, 0, "RESOURCE_STALLS",
! 192: "Number of cycles during which there are resource-related stalls."},
! 193: {0xc0, 0, "INST_RETIRED",
! 194: "Number of instructions retired."},
! 195: {0xc1, CFL_C0, "FLOPS",
! 196: "Number of computational floating-point operations retired."},
! 197: {0xc2, 0, "UOPS_RETIRED",
! 198: "Number of UOPs retired."},
! 199: {0xc4, 0, "BR_INST_RETIRED",
! 200: "Number of branch instructions retired."},
! 201: {0xc5, 0, "BR_MISS_PRED_RETIRED",
! 202: "Number of mispredicted branches retired."},
! 203: {0xc6, 0, "CYCLES_INT_MASKED",
! 204: "Number of processor cycles for which interrupts are disabled."},
! 205: {0xc7, 0, "CYCLES_INT_PENDING_AND_MASKED",
! 206: "Number of processor cycles for which interrupts are disabled "
! 207: "and interrupts are pending."},
! 208: {0xc8, 0, "HW_INT_RX",
! 209: "Number of hardware interrupts received."},
! 210: {0xc9, 0, "BR_TAKEN_RETIRED",
! 211: "Number of taken branches retired."},
! 212: {0xca, 0, "BR_MISS_PRED_TAKEN_RET",
! 213: "Number of taken mispredictioned branches retired."},
! 214: {0xd0, 0, "INST_DECODER",
! 215: "Number of instructions decoded."},
! 216: {0xd2, 0, "PARTIAL_RAT_STALLS",
! 217: "Number of cycles or events for partial stalls."},
! 218: {0xe0, 0, "BR_INST_DECODED",
! 219: "Number of branch instructions decoded."},
! 220: {0xe2, 0, "BTB_MISSES",
! 221: "Number of branches that miss the BTB."},
! 222: {0xe4, 0, "BR_BOGUS",
! 223: "Number of bogus branches."},
! 224: {0xe6, 0, "BACLEARS",
! 225: "Number of times BACLEAR is asserted."},
! 226: {0x0, 0, NULL, NULL},
! 227: };
! 228:
! 229: static void
! 230: printdesc (char *desc)
! 231: {
! 232: char *p;
! 233:
! 234: for (;;) {
! 235: while (*desc == ' ')
! 236: desc++;
! 237: if (strlen (desc) < 70) {
! 238: if (*desc)
! 239: printf (" %s\n", desc);
! 240: return;
! 241: }
! 242: p = desc + 72;
! 243: while (*--p != ' ')
! 244: ;
! 245: while (*--p == ' ')
! 246: ;
! 247: p++;
! 248: printf (" %.*s\n", p - desc, desc);
! 249: desc = p;
! 250: }
! 251:
! 252: }
1.1 dm 253:
254: /* Print all possible counter functions */
255: static void
1.3 ! dm 256: list (int fam)
1.1 dm 257: {
1.3 ! dm 258: struct ctrfn *cfnp;
1.1 dm 259:
1.3 ! dm 260: if (fam == 5)
! 261: cfnp = p5fn;
! 262: else if (fam == 6)
! 263: cfnp = p6fn;
! 264: else {
! 265: fprintf (stderr, "Unknown CPU family %d\n", fam);
! 266: exit (1);
! 267: }
! 268: printf ("Hardware counter functions for the %s:\n\n",
! 269: fam == 5 ? "Pentium" : "Pentium Pro");
! 270: for (; cfnp->name; cfnp++) {
! 271: printf ("%02x %s", cfnp->fn, cfnp->name);
! 272: if (cfnp->flags & CFL_MESI)
! 273: printf ("/mesi");
! 274: else if (cfnp->flags & CFL_SA)
! 275: printf ("/a");
! 276: if (cfnp->flags & CFL_C0)
! 277: printf (" (ctr0 only)");
! 278: if (cfnp->flags & CFL_C1)
! 279: printf (" (ctr1 only)");
! 280: printf ("\n");
! 281: if (cfnp->desc)
! 282: printdesc (cfnp->desc);
! 283: }
! 284: }
! 285:
! 286: struct ctrfn *
! 287: fn2cfnp (u_int family, u_int sel)
! 288: {
! 289: struct ctrfn *cfnp;
! 290:
! 291: if (family == 6) {
! 292: cfnp = p6fn;
! 293: sel &= 0xff;
! 294: }
! 295: else {
! 296: cfnp = p5fn;
! 297: sel &= 0x3f;
! 298: }
! 299: for (; cfnp->name; cfnp++)
! 300: if (cfnp->fn == sel)
! 301: return (cfnp);
! 302: return (NULL);
! 303: }
! 304:
! 305: static char *
! 306: fn2str (int family, u_int sel)
! 307: {
! 308: static char buf[128];
! 309: char um[9] = "";
! 310: char cm[6] = "";
! 311: struct ctrfn *cfnp;
! 312: u_int fn;
! 313:
! 314: if (family == 5) {
! 315: fn = sel & 0x3f;
! 316: cfnp = fn2cfnp (family, fn);
! 317: sprintf (buf, "%c%c%c %02x %s",
! 318: sel & P5CTR_C ? 'c' : '-',
! 319: sel & P5CTR_U ? 'u' : '-',
! 320: sel & P5CTR_K ? 'k' : '-',
! 321: fn, cfnp ? cfnp->name : "unknown function");
! 322: }
! 323: else if (family == 6) {
! 324: fn = sel & 0xff;
! 325: cfnp = fn2cfnp (family, fn);
! 326: if (cfnp && cfnp->flags & CFL_MESI)
! 327: sprintf (um, "/%c%c%c%c",
! 328: sel & P6CTR_UM_M ? 'm' : '-',
! 329: sel & P6CTR_UM_E ? 'e' : '-',
! 330: sel & P6CTR_UM_S ? 's' : '-',
! 331: sel & P6CTR_UM_I ? 'i' : '-');
! 332: else if (cfnp && cfnp->flags & CFL_SA)
! 333: sprintf (um, "/%c", sel & P6CTR_UM_A ? 'a' : '-');
! 334: if (sel >> 24)
! 335: sprintf (cm, "+%d", sel >> 24);
! 336: sprintf (buf, "%c%c%c%c %02x%s%s%*s %s",
! 337: sel & P6CTR_I ? 'i' : '-',
! 338: sel & P6CTR_E ? 'e' : '-',
! 339: sel & P6CTR_K ? 'k' : '-',
! 340: sel & P6CTR_U ? 'u' : '-',
! 341: fn, cm, um, 7 - (strlen (cm) + strlen (um)), "",
! 342: cfnp ? cfnp->name : "unknown function");
! 343: }
! 344: else
! 345: return (NULL);
! 346: return (buf);
1.1 dm 347: }
348:
349: /* Print status of counters */
350: static void
351: readst (void)
352: {
353: int fd, i;
354: struct pctrst st;
355:
356: fd = open (_PATH_PCTR, O_RDONLY);
357: if (fd < 0) {
358: perror (_PATH_PCTR);
359: exit (1);
360: }
361: if (ioctl (fd, PCIOCRD, &st) < 0) {
362: perror ("PCIOCRD");
363: exit (1);
364: }
365: close (fd);
366:
1.3 ! dm 367: if (cpufamily == 6) {
! 368: st.pctr_hwc[0] = rdpmc (0);
! 369: st.pctr_hwc[1] = rdpmc (1);
! 370: }
1.1 dm 371: for (i = 0; i < PCTR_NUM; i++)
1.3 ! dm 372: printf (" ctr%d = %16qd [%s]\n", i, st.pctr_hwc[i],
! 373: fn2str (cpufamily, st.pctr_fn[i]));
1.1 dm 374: printf (" tsc = %16qd\n idl = %16qd\n", st.pctr_tsc, st.pctr_idl);
375: }
376:
377: static void
1.2 dm 378: setctr (int ctr, u_int val)
1.1 dm 379: {
380: int fd;
381:
382: fd = open (_PATH_PCTR, O_WRONLY);
383: if (fd < 0) {
384: perror (_PATH_PCTR);
385: exit (1);
386: }
387: if (ioctl (fd, PCIOCS0 + ctr, &val) < 0) {
388: perror ("PCIOCSn");
389: exit (1);
390: }
391: close (fd);
392: }
393:
394: static void
395: usage (void)
396: {
397: fprintf (stderr,
1.3 ! dm 398: "usage:\n"
! 399: " %s\n"
! 400: " Read the counters.\n"
! 401: " %s -l [5|6]\n"
! 402: " List all possible counter functions for P5/P6.\n",
! 403: progname, progname);
! 404: if (cpufamily == 5)
! 405: fprintf (stderr,
! 406: " %s -s {0|1} [-[c][u][k]] function\n"
! 407: " Configure counter.\n"
! 408: " 0/1 - counter to configure\n"
! 409: " c - count cycles not events\n"
! 410: " u - count events in user mode (ring 3)\n"
! 411: " k - count events in kernel mode (rings 0-2)\n",
! 412: progname);
! 413: else if (cpufamily == 6)
! 414: fprintf (stderr,
! 415: " %s -s {0|1} [-[i][e][k][u]] "
! 416: "function[+cm][/{[m][e][s][i]|[a]}]\n"
! 417: " Configure counter.\n"
! 418: " 0/1 - counter number to configure\n"
! 419: " i - invert cm\n"
! 420: " e - edge detect\n"
! 421: " k - count events in kernel mode (rings 0-2)\n"
! 422: " u - count events in user mode (ring 3)\n"
! 423: " cm - # events/cycle required to bump ctr\n"
! 424: " mesi - Modified/Exclusive/Shared/Invalid in cache\n"
! 425: " s/a - self generated/all events\n", progname);
1.1 dm 426: exit (1);
427: }
428:
429:
430: int
431: main (int argc, char **argv)
432: {
433: int fd;
434: u_int ctr;
435: char *cp;
1.3 ! dm 436: u_int fn, fl = 0;
1.2 dm 437: pctrval id = __cpuid ();
1.3 ! dm 438: char **ap;
! 439: int ac;
! 440: struct ctrfn *cfnp;
1.2 dm 441:
1.3 ! dm 442: cpufamily = (id >> 8) & 0xf;
1.1 dm 443:
444: if (progname = strrchr (argv[0], '/'))
445: progname++;
446: else
447: progname = argv[0];
448:
449: if (argc <= 1)
450: readst ();
451: else if (argc == 2 && !strcmp (argv[1], "-l"))
1.3 ! dm 452: list (cpufamily);
! 453: else if (argc == 3 && !strcmp (argv[1], "-l"))
! 454: list (atoi (argv[2]));
1.1 dm 455: else if (!strcmp (argv[1], "-s") && argc >= 4) {
456: ctr = atoi (argv[2]);
457: if (ctr >= PCTR_NUM)
458: usage ();
1.3 ! dm 459: ap = &argv[3];
! 460: ac = argc - 3;
! 461:
! 462: if (cpufamily == 6)
! 463: fl |= P6CTR_EN;
! 464: if (**ap == '-') {
! 465: cp = *ap;
! 466: if (cpufamily == 6)
! 467: while (*++cp)
! 468: switch (*cp) {
! 469: case 'i':
! 470: fl |= P6CTR_I;
! 471: break;
! 472: case 'e':
! 473: fl |= P6CTR_E;
! 474: break;
! 475: case 'k':
! 476: fl |= P6CTR_K;
! 477: break;
! 478: case 'u':
! 479: fl |= P6CTR_U;
! 480: break;
! 481: default:
! 482: usage ();
! 483: }
! 484: else
! 485: while (*++cp)
! 486: switch (*cp) {
! 487: case 'c':
! 488: fl |= P5CTR_C;
! 489: break;
! 490: case 'k':
! 491: fl |= P5CTR_K;
! 492: break;
! 493: case 'u':
! 494: fl |= P5CTR_U;
! 495: break;
! 496: default:
! 497: usage ();
! 498: }
! 499: ap++;
! 500: ac--;
! 501: }
! 502: else {
! 503: if (cpufamily == 6)
! 504: fl |= P6CTR_U|P6CTR_K;
! 505: else
! 506: fl |= P5CTR_U|P5CTR_K;
! 507: }
! 508:
! 509: if (!ac)
! 510: usage ();
! 511:
! 512: fn = strtoul (*ap, NULL, 16);
! 513: if (cpufamily == 6 && (fn & ~0xff) || cpufamily != 6 && (fn & ~0x3f))
! 514: usage ();
! 515: fl |= fn;
! 516: if (cpufamily == 6 && (cp = strchr (*ap, '+'))) {
! 517: cp++;
! 518: fn = strtol (cp, NULL, 0);
! 519: if (fn & ~0xff)
1.1 dm 520: usage ();
1.3 ! dm 521: fl |= (fn << 24);
1.1 dm 522: }
1.3 ! dm 523: cfnp = fn2cfnp (6, fl);
! 524: if (cpufamily == 6 && cfnp && (cp = strchr (*ap, '/'))) {
! 525: if (cfnp->flags & CFL_MESI)
! 526: while (*++cp)
! 527: switch (*cp) {
! 528: case 'm':
! 529: fl |= P6CTR_UM_M;
! 530: break;
! 531: case 'e':
! 532: fl |= P6CTR_UM_E;
! 533: break;
! 534: case 's':
! 535: fl |= P6CTR_UM_S;
! 536: break;
! 537: case 'i':
! 538: fl |= P6CTR_UM_I;
! 539: break;
! 540: default:
! 541: usage ();
! 542: }
! 543: else if (cfnp->flags & CFL_SA)
! 544: while (*++cp)
! 545: switch (*cp) {
! 546: case 'a':
! 547: fl |= P6CTR_UM_A;
! 548: break;
! 549: default:
! 550: usage ();
! 551: }
! 552: else
1.1 dm 553: usage ();
554: }
1.3 ! dm 555: else if (cfnp && (cfnp->flags & CFL_MESI))
! 556: fl |= P6CTR_UM_MESI;
! 557: ap++;
! 558: ac--;
! 559:
! 560: if (ac)
! 561: usage ();
! 562:
! 563: if (cpufamily == 6 && ! (fl & 0xff))
! 564: fl = 0;
! 565: setctr (ctr, fl);
1.1 dm 566: }
567: else
568: usage ();
569:
570: return 0;
571: }
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