[BACK]Return to sparc.html CVS log [TXT][DIR] Up to [local] / www

Diff for /www/sparc.html between version 1.60 and 1.61

version 1.60, 1999/02/02 02:31:27 version 1.61, 1999/02/25 17:57:10
Line 160 
Line 160 
  <li> sun4c: SS1, SS1+, IPC, SLC, SS2, IPX, and ELC. (<strong>Please note   <li> sun4c: SS1, SS1+, IPC, SLC, SS2, IPX, and ELC. (<strong>Please note
         that SBus DMA peripherals do not work in some of the slots of an          that SBus DMA peripherals do not work in some of the slots of an
         SS1 or SS1+</strong>).          SS1 or SS1+</strong>).
  <li> sun4m: at least the LC, LX, 4, 5, 10, and 20. A few cpu   <li> sun4m: at least the LC, LX, 4, 5, 10, 20, and 600MP. A few cpu
         combinations do not work reliably, as well as a few odd memory          combinations do not work reliably, as well as a few odd memory
         configurations.          configurations.  600MP support is not as robust as the other
           sun4m machines.
  <li> Typically it works on faithful clones of these machines   <li> Typically it works on faithful clones of these machines
 </ul>  </ul>
   
Line 274 
Line 275 
  <li> sun4: 4/400 (lacks support for the I/O cache, and has Ethernet problems)   <li> sun4: 4/400 (lacks support for the I/O cache, and has Ethernet problems)
  <li> sun4m: older systems with Viking (TMS390Z55) processor modules   <li> sun4m: older systems with Viking (TMS390Z55) processor modules
         without external cache chips, aka SuperCache, aka MXCC, aka PAC.          without external cache chips, aka SuperCache, aka MXCC, aka PAC.
  <li> sun4m: model 4/600 -- uses auxio registers, sun4m VME, I/O cache?  
  <li> sun4m: with Ross HyperSparc processor modules   <li> sun4m: with Ross HyperSparc processor modules
  <li> sun4d: SPARC Server 1000, SPARC Center 2000 -- XD-Bus vs. M-Bus,   <li> sun4d: SPARC Server 1000, SPARC Center 2000 -- XD-Bus vs. M-Bus,
         MP issues.          MP issues.

Legend:
Removed from v.1.60  
changed lines
  Added in v.1.61